Co-packaged optics/CPO is not actually a photonics problem...it is really a packaging problem. The hard part is putting optical engines next to v hot AI chips - without destroying yield or reliability. That is why the Intel angle is interesting. TSMC’s CoWoS uses giant interposers. Powerful, but expensive, thermally difficult, reticle-constrained, and harder to scale as packages get larger. Intel’s EMIB uses small local silicon bridges instead. You localize the high-density connection only where needed, which could make optical I/O easier to manufacture and cool. If CPO becomes a packaging war, im thinking that Intel’s silicon photonics history plus EMIB may matter more than people think. $INTC
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